When signals are output from one integrated circuit to another via connections on a PCB (Printed Circuit Board), it is generally necessary to amplify them in order to overcome large parasitic capacitance charges present at the two PCB-integrated circuit interfaces. These parasitic charges degrade the signal and thus limit the maximum frequency at which the signal can be transmitted. Output buffers and often pre-amplifiers are used to amplify the output signals. Furthermore, to ensure signal integrity of the transmitted signal at the destination circuit, impedance matching is often performed, such that the impedance of the output buffers matches the impedance of the PCB lines.
Signal integrity includes factors such as signal overshoots, signal slopes, propagation delays and signal to noise ratios, these factors determining when data can be correctly received at the destination circuit. However, due to varying PVT (Process, Voltage and Temperature) conditions, the output impedance of the output buffers in transmission mode may vary at different operating conditions, and can lead to a mismatch between the output impedance and the impedance of the PCB lines, leading to a degradation of the signal integrity.
As clock speeds increase, the rate of data transmission on such PCB lines is also increasing. This makes signal integrity all the more important, and thus precise impedance matching of the impedance of the output buffer with the impedance of the PCB lines for all PVT conditions is critical.
While some solutions exist for matching the output impedance of the output buffers to the impedance of the PCB lines, such solutions are generally inadequate for providing acceptable signal integrity at increased data rates.